In recent years, the use of class D amplifiers has become widespread in audio applications. Class D amplifiers are highly efficient and compact, which leads to the reduced cooling requirements and power supply. The operating principle of these class-D power amplifiers is to convert analog or digital audio signals to high frequency pulse width modulation (PWM) signals, and then use the generated PWM signals to drive power MOSFETs in either half-bridge or full-bridge topologies. Passive low pass filters are finally used to convert the output signal of the power MOSFETs into a low frequency analog waveform suitable for audio speakers.
The above approach to implement a class-D amplifier is relatively straightforward. However, to produce high-quality audio signals, there are still a number of issues associated with these amplifiers worth addressing. One major issue is the degradation of the output analog signal by power supply noise and the non-ideal output stage.
For half-bridge topologies, there is no common-mode rejection since they are single-ended by nature, and any noise on the amplifier's power supply will be directly coupled to the output. This undesirable effect becomes even worse for digital class-D amplifiers, in which the power MOSFETs are switched between the supply and the output, and essentially the supply is used as a voltage reference. Hence, without additional noise cancellation structures, the power supply rejection ratio (PSRR) performance of half-bridge class-D amplifiers is unacceptable. Unlike half-bridge topologies, full-bridge class-D amplifiers have sufficient common mode rejection capability to remove the power supply noise effect on the output since the resulting differential output is powered from the same supply. However, they still suffer from the transient behavior of the power supply, which can result from the changes of DC supply level due to load variations. Furthermore, non-ideal power MOSFETs and mismatches in switching circuitry will also degrade the PSRR performance of the full-bridge topologies.
Another approach often used to suppress the noise in a class D audio amplifier is a sigma delta modulator configuration. A sigma delta modulator shapes the noise in high frequency and then uses low pass filters to output only audio analog signals. Referring to FIG. 1, a schematic diagram of a prior-art class D amplifier 100 that illustrates the use of a sigma-delta modulator configuration to improve its noise performance is illustrated. Prior art class D amplifier 100 receives an analog input signal (VIN) at an input terminal 101. The sigma delta modulator includes a summing circuit 102, an integrator 103 connected to a comparator 104, and a latch 105 converting the difference between a feedback output signal and the analog input signal (VIN) into a bit stream that carries quantized noise spikes imposed on the original analog input signal (VIN). A switching circuit 107 including a high-side MOSFET transistor 107_1 and a low-side MOSFET transistor 107_2 operating in push-pull mode is then used to pulse modulate the bit stream. In order to regain the original PWM input signal (VIN), a simple LC low pass filter 109 is used to filter out the noise spikes shaped at high frequency. However, the technique has drawbacks for PWM inputs, since the output frequency is not directly controlled and is subject to component variations. Further, distortions caused by non-idealities of the power MOSFET transistors 107_1 and 107_2 and integrator 103 are left uncorrected by prior art class D audio amplifier 100. The time constant of integrator 103 may affect the switching rate of switching circuit 107. Moreover, the inductor current at the output of switching circuit 107 often inadvertently stretches or shortens the pulse widths of the drive signal.